The present invention relates to a high-density semiconductor memory device having a stacked capacitor structure and a method of manufacturing the same, and more particularly, to a data storage capacitor having an improved charge storage electrode and a method of manufacturing the same.
In the field of DRAMs (Dynamic RAMs) having capacitors for holding data, various kinds of techniques have been developed to ensure a given data storage charge amount to deal with the decrease of the cell area resulting from miniaturization. An example is disclosed in H. Watanabe et al., xe2x80x9cAn Advanced Fabrication Technology of Hemispherical Grained (HSG) Poly-Si for High Capacitance Storage Electrodesxe2x80x9d, Extended Abstracts of the 1991 International Conference on SSDM, pp. 478 -480, 1991. This reference describes a so-called roughened surface technology (to be referred to as an xe2x80x9cHSG technologyxe2x80x9d hereinafter) with which a polysilicon film as an electrode of a capacitor is annealed in vacuum to form small hemispherical grains on the surface of the polysilicon film. An example in which this HSG technology is applied to a DRAM is also known. This example is disclosed in, e.g., xe2x80x9cA Capacitor-Over-Bitline (COB) Cell with A Hemispherical Grain Storage Node for 64 Mb DRAMsxe2x80x9d, IEDM90 Technical Digest, pp. 665-658, 1990, or xe2x80x9cMethod of Forming A Capacitorxe2x80x9d, U.S. Pat. No. 5,444,013.
With the HSG technology, the surface area of a polysilicon film as an electrode of a capacitor can be increased. As a consequence, the capacitance required to store data increases, and a desired storage charge amount can be ensured.
When a silicon nitride film is used as the dielectric film of a capacitor, polysilicon is normally used as an electrode material. The HSG technology is advantageous in increasing the electrode area of a capacitor when polysilicon is used as an electrode material.
A method of forming a rough or undulated surface on a polysilicon film as the lower electrode (storage electrode) of a capacitor using the HSG technology will be briefly described. As shown in FIG. 39, an insulating interlayer 2 is formed on a semiconductor substrate (not shown), and then, a contact plug 3 connected to an element region on the semiconductor substrate is formed. Polysilicon is deposited at 550xc2x0 C. by, e.g., low-pressure CVD. The deposited polysilicon is patterned by the conventional lithography and RIE to form a polysilicon film 601 as the lower electrode of a capacitor. Subsequently, as shown in FIG. 40, after a natural oxide film on the polysilicon film is removed by a diluted HF solution, the resultant structure is annealed in vacuum to obtain a polysilicon film 602 with a rough or undulated surface. With this process, a capacitor having large electrode area and capacitance can be obtained.
Another technique of improving the capacitance to ensure a given data storage charge amount is known. For example, xe2x80x9cGiga-bit Scale DRAM Cell with New Simple Ru/(Ba,Sr)TiO3/Ru Stacked Capacitors Using X-ray Lithographyxe2x80x9d, IEDM95 Technical Digest, pp. 903-906, 1995 discloses a technique using a high-dielectric film of (Ba,Sr)TiO3 (to be referred to as a xe2x80x9cBSTOxe2x80x9d hereinafter) having a high dielectric constant as the dielectric film of a capacitor.
As a semiconductor device becomes further minute in size in feature, both the electrode area of a capacitor and the dielectric constant of a dielectric film need be improved. A technique of combining an electrode having a rough or undulated surface and a high-dielectric film to form a capacitor meets this requirement.
A high-dielectric film such as a BSTO film is a metal oxide film. In the process of depositing a metal oxide film, active oxygen is contained in the atmosphere. When polysilicon is used for the electrode of a capacitor, and BSTO is used for the dielectric film, the polysilicon surface is oxidized during deposition of BSTO to form an SiO2 film having a low dielectric constant. As a result, the capacitance becomes low. Hence, in the prior art, when a metal oxide such as BSTO is used for the dielectric film of a capacitor, a metal such as platinum (Pt) or ruthenium (Ru) must be used as an electrode material.
However, in the use of the above-described HSG technology, a rough pattern can be formed on a polysilicon surface, but it is not possible to form rough pattern on a metal surface. For this reason, when a metal such as platinum or ruthenium is used as the electrode material of a capacitor, the electrode area can hardly be increased.
The present invention has been made in consideration of the above situation, and has as its object to provide a semiconductor memory device including a capacitor having a capacitance improved by a metal electrode having a rough or undulated surface, and a method of manufacturing the same.
According to the present invention, there is provided a capacitor in a semiconductor device, comprising a cylindrical lower electrode having a side wall portion, a bottom portion, and an open upper end, at least the side wall portion of the cylindrical lower electrode being formed in an undulated shape; a dielectric material film being formed to cover the cylindrical lower electrode; and an upper electrode being formed on the dielectric material film to face the cylindrical lower electrode through the dielectric film, wherein the cylindrical lower electrode is made of at least one of a metal and a metal oxide.
In the semiconductor memory device of the invention, the inner and outer surfaces of the side wall portion of the lower electrode are rough or undulated such that one surface corresponds to the other surface in shape. In other words, the side wall is undulated such that a convex portion on the outer surface corresponds with a concave portion on the inner surface, and vice versa. With these rough or undulated surfaces, the surface areas of the lower and upper electrodes of the capacitor increase, and the electrode area of the capacitor is improved. In addition, since a capacitor structure is formed on both surfaces of the side wall portion of the lower electrode, a larger capacitance can be obtained. Hence, the capacitance for data storage can be improved, and the cell area can be reduced.
According to the present invention, there is also provided a capacitor in a semiconductor device, comprising a cylindrical lower electrode having a side wall portion, a bottom portion, and an open upper end, at least the side wall portion of the cylindrical lower electrode being formed in an undulated shape; a dielectric material film being formed to cover the cylindrical lower electrode; and an upper electrode formed on the dielectric material film to face the cylindrical lower electrode through the dielectric film, wherein the inner surface and the outer surface of the side wall portion are curved in parallel.
According to the present invention, there is further provided a capacitor in a semiconductor device, comprising a lower electrode comprising a first conductive material film having an undulated surface and a second conductive material film formed on the undulated surface of the first conductive material film; a dielectric material film being formed to cover an undulated surface of the second conductive material film; and an upper electrode being formed on the dielectric material film to face the lower electrode through the dielectric material film.
According to this semiconductor memory device, since the lower electrode has a rough or undulated surface, a capacitor having a large electrode area can be obtained. Hence, a capacitor with an improved capacitance and a small cell area can be provided.
The conductive material films may be formed on the rough or undulated surface of the silicon semiconductor film by plating.
According to the capacitor of the invention, since a metal film may be formed on the surface of the lower electrode, any chemical reaction between the lower electrode and dielectric film can be suppressed, so the capacitance can be prevented from lowering due to the product of the chemical reaction (e.g., oxidation).
In addition, a reaction barrier layer for suppressing chemical reaction (e.g., silicidation) may be inserted between the lower electrode structure and the metal film. With this arrangement, the quality of the dielectric film can be kept high, and a high-quality semiconductor memory device can be obtained.
According to the present invention, there is provided a method for forming a capacitor in a semiconductor device, comprising the steps of forming a film having an undulated surface; depositing a conductive material film on the film so as to have the shape of the conductive material film conform to the undulated surface of the conductive material film; forming a lower electrode by removing the conductive material film while leaving the film; forming a dielectric material film to cover inner and outer surfaces of the lower electrode; and forming an upper electrode on one surface of the dielectric material film to face the lower electrode through the dielectric material film.
According to this manufacturing method, since a rough pattern is formed on the inner wall of the hole portion in the silicon semiconductor film, and the lower electrode is formed using the silicon semiconductor film as a mould, a rough pattern can be formed on the surface of the lower electrode made of a metal which is difficult to be roughen. The surface of the lower electrode is rough such that convex and concave portions are formed on the outer surface in correspondence with concave and convex portions on the inner surface, so the electrode area of the capacitor is increased. For the dielectric film of the capacitor, a metal oxide can be used. Hence, the capacitance for data storage can be increased, and a semiconductor memory device with a small cell area and high degree of integration can be obtained.
According to the present invention, there is further provided a method for forming a capacitor in a semiconductor device, comprising the steps of forming a film having an undulated surface; forming a lower electrode by forming a conductive material film on the undulated surface of the film; forming a dielectric material film so as to cover one surface of the conductive material film; and forming an upper electrode on the dielectric material film so as to face the lower electrode through the dielectric material film.
According to this manufacturing method, a lower electrode can be provided by forming the conductive material film on the rough or undulated surface of the film. With this arrangement, the electrode area of the capacitor is increased, and the capacitance is improved. Since the capacitor is buried in the insulating layer, planarization after capacitor formation is facilitated, and the subsequent miniaturization process is also facilitated. Hence, a semiconductor memory device having a small cell area and high degree of integration can be obtained.
The conductive material film may be formed by plating.
According to this manufacturing method, a lower electrode can be formed by plating a conductive material on the rough or undulated surface of the film. With this arrangement, the electrode area of the capacitor increases, and oxidation between the silicon semiconductor film and dielectric film can be prevented by the first conductive film. Hence, the capacitance for data storage can be improved, and a semiconductor memory device having a small cell area and high degree of integration can be obtained.
The method may further comprise, between the step of forming a rough or undulated surface on the film and the step of forming the conductive film, forming a reaction barrier layer for suppressing a chemical reaction between the film and the conductive material film. With this arrangement, the quality of the dielectric film can be kept high, and a high-quality semiconductor memory device can be obtained. The conductive material film may be formed by electroplating or electroless plating. For the dielectric film, a high-dielectric material such as a metal oxide can be used. Hence, the capacitance can be further improved, and the storage charge amount can be increased.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.